Dennard Scaling
Updated 2026-08-05
INTRODUCTION
English translation pending.
CORE DEFINITION
Described by Robert Dennard, the scaling rule states that as transistor dimensions and supply voltage shrink together, power density remains roughly constant, so clock frequency can rise and more devices can be integrated without increasing power per unit area. It held for decades and underpinned the industry's growth. The core claim is that scaling delivered performance gains without additional design effort. The qualification is that the rule broke down around 2006, as leakage currents and heat dissipation set hard limits.
SCAFFOLDING EFFECT
Reduce cognitive load
- Use Free-Lunch Check: Ask whether your gains come from your own work or from an underlying trend that may stop. - Use Mode Switch: Shift from riding a scaling trend to competing on architecture and optimization. - Use Limit Watch: Monitor leakage and thermal constraints that end a scaling regime before assuming it continues.
Anchor fast decisions
Reducing feature size while scaling voltage down proportionally lowers the energy per switching operation by about the same factor as the density increases, so power per unit area stays flat while capability grows. Once voltage could no longer be scaled down without excessive leakage, that cancellation failed, and frequency increases began to raise power density until heat removal became the binding constraint. Gains then had to come from design rather than from geometry.
MINIMUM ACTION
In progress 0/1Practice this model in one real situation:
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Source support: Explicit
- en.wikipedia.orghttps://en.wikipedia.org/wiki/Dennard_scalingverified
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